AccuracyCoin Report - AprNes
| # | Test | Result | Addr |
| 1 | ROM is not writable | PASS | $0405=01 |
| 2 | RAM Mirroring | PASS | $0403=01 |
| 3 | PC Wraparound | PASS | $044D=01 |
| 4 | The Decimal Flag | PASS | $0474=01 |
| 5 | The B Flag | PASS | $0475=01 |
| 6 | Dummy read cycles | PASS | $0406=01 |
| 7 | Dummy write cycles | PASS | $0407=01 |
| 8 | Open Bus | PASS | $0408=01 |
| 9 | All NOP instructions | PASS | $047D=01 |
| # | Test | Result | Addr |
| 1 | Absolute Indexed | PASS | $046E=01 |
| 2 | Zero Page Indexed | PASS | $046F=01 |
| 3 | Indirect | PASS | $0470=01 |
| 4 | Indirect, X | PASS | $0471=01 |
| 5 | Indirect, Y | PASS | $0472=01 |
| 6 | Relative | PASS | $0473=01 |
| # | Test | Result | Addr |
| 1 | $03 SLO (indirect,X) | PASS | $0409=01 |
| 2 | $07 SLO zeropage | PASS | $040A=01 |
| 3 | $0F SLO absolute | PASS | $040B=01 |
| 4 | $13 SLO (indirect),Y | PASS | $040C=01 |
| 5 | $17 SLO zeropage,X | PASS | $040D=01 |
| 6 | $1B SLO absolute,Y | PASS | $040E=01 |
| 7 | $1F SLO absolute,X | PASS | $040F=01 |
| # | Test | Result | Addr |
| 1 | $23 RLA (indirect,X) | PASS | $0419=01 |
| 2 | $27 RLA zeropage | PASS | $041A=01 |
| 3 | $2F RLA absolute | PASS | $041B=01 |
| 4 | $33 RLA (indirect),Y | PASS | $041C=01 |
| 5 | $37 RLA zeropage,X | PASS | $041D=01 |
| 6 | $3B RLA absolute,Y | PASS | $041E=01 |
| 7 | $3F RLA absolute,X | PASS | $041F=01 |
| # | Test | Result | Addr |
| 1 | $43 SRE (indirect,X) | PASS | $0420=01 |
| 2 | $47 SRE zeropage | PASS | $047F=01 |
| 3 | $4F SRE absolute | PASS | $0422=01 |
| 4 | $53 SRE (indirect),Y | PASS | $0423=01 |
| 5 | $57 SRE zeropage,X | PASS | $0424=01 |
| 6 | $5B SRE absolute,Y | PASS | $0425=01 |
| 7 | $5F SRE absolute,X | PASS | $0426=01 |
| # | Test | Result | Addr |
| 1 | $63 RRA (indirect,X) | PASS | $0427=01 |
| 2 | $67 RRA zeropage | PASS | $0428=01 |
| 3 | $6F RRA absolute | PASS | $0429=01 |
| 4 | $73 RRA (indirect),Y | PASS | $042A=01 |
| 5 | $77 RRA zeropage,X | PASS | $042B=01 |
| 6 | $7B RRA absolute,Y | PASS | $042C=01 |
| 7 | $7F RRA absolute,X | PASS | $042D=01 |
| # | Test | Result | Addr |
| 1 | $83 SAX (indirect,X) | PASS | $042E=01 |
| 2 | $87 SAX zeropage | PASS | $042F=01 |
| 3 | $8F SAX absolute | PASS | $0430=01 |
| 4 | $97 SAX zeropage,Y | PASS | $0431=01 |
| 5 | $A3 LAX (indirect,X) | PASS | $0432=01 |
| 6 | $A7 LAX zeropage | PASS | $0433=01 |
| 7 | $AF LAX absolute | PASS | $0434=01 |
| 8 | $B3 LAX (indirect),Y | PASS | $0435=01 |
| 9 | $B7 LAX zeropage,Y | PASS | $0436=01 |
| 10 | $BF LAX absolute,X | PASS | $0437=01 |
| # | Test | Result | Addr |
| 1 | $C3 DCP (indirect,X) | PASS | $0438=01 |
| 2 | $C7 DCP zeropage | PASS | $0439=01 |
| 3 | $CF DCP absolute | PASS | $043A=01 |
| 4 | $D3 DCP (indirect),Y | PASS | $043B=01 |
| 5 | $D7 DCP zeropage,X | PASS | $043C=01 |
| 6 | $DB DCP absolute,Y | PASS | $043D=01 |
| 7 | $DF DCP absolute,X | PASS | $043E=01 |
| # | Test | Result | Addr |
| 1 | $E3 ISC (indirect,X) | PASS | $043F=01 |
| 2 | $E7 ISC zeropage | PASS | $0440=01 |
| 3 | $EF ISC absolute | PASS | $0441=01 |
| 4 | $F3 ISC (indirect),Y | PASS | $0442=01 |
| 5 | $F7 ISC zeropage,X | PASS | $0443=01 |
| 6 | $FB ISC absolute,Y | PASS | $0444=01 |
| 7 | $FF ISC absolute,X | PASS | $0445=01 |
| # | Test | Result | Addr |
| 1 | $93 SHA (indirect),Y | PASS | $0446=09 |
| 2 | $9F SHA absolute,Y | PASS | $0447=09 |
| 3 | $9B SHS absolute,Y | PASS | $0448=09 |
| 4 | $9C SHY absolute,X | PASS | $0449=01 |
| 5 | $9E SHX absolute,Y | PASS | $044A=01 |
| 6 | $BB LAE absolute,Y | PASS | $044B=01 |
| # | Test | Result | Addr |
| 1 | $0B ANC Immediate | PASS | $0410=01 |
| 2 | $2B ANC Immediate | PASS | $0411=01 |
| 3 | $4B ASR Immediate | PASS | $0412=01 |
| 4 | $6B ARR Immediate | PASS | $0413=01 |
| 5 | $8B ANE Immediate | PASS | $0414=01 |
| 6 | $AB LXA Immediate | PASS | $0415=01 |
| 7 | $CB AXS Immediate | PASS | $0416=01 |
| 8 | $EB SBC Immediate | PASS | $0417=01 |
| # | Test | Result | Addr |
| 1 | Interrupt flag latency | PASS | $0461=01 |
| 2 | NMI Overlap BRK | PASS | $0462=01 |
| 3 | NMI Overlap IRQ | PASS | $0463=01 |
| # | Test | Result | Addr |
| 1 | DMA + Open Bus | PASS | $046C=01 |
| 2 | DMA + $2002 Read | PASS | $0488=05 |
| 3 | DMA + $2007 Read | PASS | $044C=01 |
| 4 | DMA + $2007 Write | PASS | $044F=01 |
| 5 | DMA + $4015 Read | PASS | $045D=01 |
| 6 | DMA + $4016 Read | PASS | $045E=05 |
| 7 | DMC DMA Bus Conflicts | PASS | $046B=E1 |
| 8 | DMC DMA + OAM DMA | PASS | $0477=01 |
| 9 | Explicit DMA Abort | PASS | $0479=01 |
| 10 | Implicit DMA Abort | PASS | $0478=09 |
| # | Test | Result | Addr |
| 1 | Length Counter | PASS | $0465=01 |
| 2 | Length Table | PASS | $0466=01 |
| 3 | Frame Counter IRQ | PASS | $0467=01 |
| 4 | Frame Counter 4-step | PASS | $0468=01 |
| 5 | Frame Counter 5-step | PASS | $0469=01 |
| 6 | Delta Modulation Channel | PASS | $046A=01 |
| 7 | APU Register Activation | PASS | $045C=09 |
| 8 | Controller Strobing | PASS | $045F=01 |
| 9 | Controller Clocking | PASS | $047A=05 |
| # | Test | Result | Addr |
| 1 | CHR ROM is not writable | PASS | $0485=01 |
| 2 | PPU Register Mirroring | PASS | $0404=01 |
| 3 | PPU Register Open Bus | PASS | $044E=01 |
| 4 | PPU Read Buffer | PASS | $0476=41 |
| 5 | Palette RAM Quirks | PASS | $047E=01 |
| 6 | Rendering Flag Behavior | PASS | $0486=01 |
| 7 | $2007 read w/ rendering | PASS | $048A=01 |
| # | Test | Result | Addr |
| 1 | VBlank beginning | PASS | $0450=01 |
| 2 | VBlank end | PASS | $0451=01 |
| 3 | NMI Control | PASS | $0452=01 |
| 4 | NMI Timing | PASS | $0453=01 |
| 5 | NMI Suppression | PASS | $0454=01 |
| 6 | NMI at VBlank end | PASS | $0455=01 |
| 7 | NMI disabled at VBlank | PASS | $0456=01 |
| # | Test | Result | Addr |
| 1 | Sprite overflow behavior | PASS | $0459=01 |
| 2 | Sprite 0 Hit behavior | PASS | $0457=01 |
| 3 | $2002 flag clear timing | PASS | $048D=01 |
| 4 | Suddenly Resize Sprite | PASS | $0489=01 |
| 5 | Arbitrary Sprite zero | PASS | $0458=01 |
| 6 | Misaligned OAM behavior | PASS | $045A=01 |
| 7 | Address $2004 behavior | PASS | $045B=41 |
| 8 | OAM Corruption | PASS | $047B=01 |
| 9 | INC $4014 | PASS | $0480=01 |
| # | Test | Result | Addr |
| 1 | Attributes As Tiles | PASS | $0481=01 |
| 2 | t Register Quirks | PASS | $0482=01 |
| 3 | Stale BG Shift Registers | PASS | $0483=01 |
| 4 | Stale Sprite Shift Regs | PASS | $048F=01 |
| 5 | BG Serial In | PASS | $0487=01 |
| 6 | Sprites On Scanline 0 | PASS | $0484=05 |
| 7 | $2004 Stress Test | PASS | $048C=01 |
| 8 | $2007 Stress Test | PASS | $048E=01 |
| # | Test | Result | Addr |
| 1 | Instruction Timing | PASS | $0460=01 |
| 2 | Implied Dummy Reads | PASS | $046D=01 |
| 3 | Branch Dummy Reads | PASS | $048B=01 |
| 4 | JSR Edge Cases | PASS | $047C=01 |
AccuracyCoin | Result encoding: 0x01=PASS, (N<<2)|0x02=FAIL(N), 0xFF=SKIP, 0x00=not run